| 000 | 00565cam a2200193ua 4500 | ||
|---|---|---|---|
| 001 | 2145 | ||
| 008 | 120915n2009 ii |||gr||||Z||||||eng | ||
| 020 | _a9788177589184 | ||
| 040 | _aIN-GwRGU | ||
| 082 | _a621.395 | ||
| 100 | 1 |
_aPalnitkar, Samir, _eAuthor. |
|
| 245 | 0 | 0 |
_aVerilog HDL : _bA Guide to Digital Design and Synthesis / _cBy Samir Palnitkar . |
| 250 |
_a2nd ed / _bIEEE 1364-2001 Compliant. |
||
| 260 |
_aNew Delhi _bPearson _c2009 |
||
| 300 |
_a490p: _c23cm. |
||
| 650 | _aVerilog HDL | ||
| 650 | _aElectronics & Telecommunications | ||
| 942 |
_2ddc _cBK |
||
| 999 |
_c1996 _d1996 |
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