Chip Design for Submicron VLSI: CMOS layout and simulation /
Uyemura, John P,
Chip Design for Submicron VLSI: CMOS layout and simulation / By John P. Uyemura . - 1st ed. - New Delhi Cengage Learning 2006 - xvi, 411 p.: 24 cm.
9788131501955 8131501957
Chip Design for Submicron VLS
621.395
Chip Design for Submicron VLSI: CMOS layout and simulation / By John P. Uyemura . - 1st ed. - New Delhi Cengage Learning 2006 - xvi, 411 p.: 24 cm.
9788131501955 8131501957
Chip Design for Submicron VLS
621.395
